Typical Flash EPROM (ultraviolet erasable programmable read only memory) cell structures are either charged or discharged in order to program or erase the cells. In general terms, charging refers to the activity of putting electrons onto a floating gate of the cell, while discharging refers to the activity of taking electrons off of the floating gate of the cell. When charged, the cell has a low current and a high threshold voltage, V.sub.t. Conversely, when discharged, the cell has a high current and a low V.sub.t. The charged V.sub.t and discharged V.sub.t are usually determined by the sensing circuitry. In the present state of the art, a typical charged V.sub.t is usually 5 V, and a typical discharged V.sub.t is usually 2 V. In addition, in general, the ultraviolet threshold voltage (UVV.sub.t), which is used to define the V.sub.t of the device when the floating gate does not have any charge, i.e., when in a charge neutral state, is also about 2 V, making the discharged state and the UV erased state the same.
In a system having multiple cells, charging and discharging of the cells are done either on a bit-by-bit basis or on a global basis. In applications where Fowler Nordheim tunneling mechanism is used for discharging/charging operations, the global or bulk method is used to charge the cells. Typically, this global method is slow and performed during a slower system operation, such as a reset operation. The bit-by-bit method is preferably used for discharging the cells. For most applications, the speed of this bit-by-bit discharging is fast, preferably less than about 100 microseconds (.mu.s).
Prior attempts to reduce the speed of discharging have not been entirely successful. Typically, an attempt has been made to increase the voltage applied at a gate of the cell (V.sub.pp) in order to increase the floating gate potential and correspondingly increase the tunnel oxide voltage. The increase in the tunnel oxide voltage results in electrons being driven out of the cell faster. However, the voltage applied at the gate of the cell is produced by an internal charge pump, which is commonly limited by efficiency and typically capable of producing a voltage potential of only about 9-10 V. Further, even if the charge pump were capable of producing a higher voltage potential, usually the peripheral transistor elements of the system can only efficiently support a maximum voltage of .+-.10 V, since higher voltage support requirements would greatly increase the complexity of the process.
What is needed therefore is a Flash EPROM, core cell structure that has a fast discharge time, but that does not require an increase in applied voltage potential.